ETTUS SDR USRP X Series,
USRP X Series ETTUS X300,
ETTUS X300 USRP X Series
Xilinx Vivado 2015.2 Design Suite
At the heart of the USRP X300, the XC7K325T FPGA provides high-speed connectivity between all major components within the device including radio frontends, host interfaces, and DDR3 memory. The default FPGA core provided with UHD provides all of the functional blocks for digital down-conversion and up-conversion, fine-frequency tuning, and other DSP functions allowing it to be interchangeable with other USRP devices using the UHD architecture. The large Kintex-7 FPGA provides additional space for developers to incorporate custom DSP blocks and is compatible with a large number of USRP supported development frameworks, reference architectures, and open source projects.
Contact Person: Mr. Chen